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The DA1458x operates in two modes, namely the ‘Normal Mode’ and the ‘Development/CalibrationMode’ hereafter addressed as ‘DevMode’. The decision which mode the chip enters after power-up,
is taken by the boot code residing in the ROM. A complete flow chart of the booting code is illustrated
in the datasheet of the DA1458x.
DevMode will be entered when the OTP header contains a value zero at the first two addresses,
when read by the CPU. This implies that the OTP is not programmed and the DA1458x should switch
to the DevMode, so that users get access to download code from external devices into the internal
SRAM (SysRAM). However, when the OTP contains specific values (magic numbers) in these
locations the DA1458x will enter Normal Mode and proceed with mirroring of the OTP contents into
the SysRAM in the booting sequence, as described in the datasheet.
To allow for maximum flexibility, a predefined number of pins are examined and utilised at boot time
to communicate with external devices using the three serial interfaces available on chip: UART, SPI
and I2C. SPI and I2C can be masters on the DA1458x side expecting to communicate with an
external slave device and SPI can also be slave expecting to communicate with an external master.
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