#2. 省电模式
登录CSR开发者账户，搜索关键词low power，查询结果中有一篇文章BlueCore Power Saving Mode。
The BlueCore chips have hardware support for two methods of reducing power consumption when the chip is idle:
Shallow Sleep: The chip processor’s clock speed is reduced. At best this can reduce current consumption to approximately 2 mA on BlueCore01b, less on BlueCore2 chips. The processor’s speed
can be restored within a few machine instructions, with a latency that depends on the slowed clock rate.
Deep Sleep: Much of the chip’s circuitry is shut down. At best, this can reduce the chip’s current consumption to approximately 100A on BlueCore01b, less on BlueCore2 chips. However, it takes at least 10 milliseconds to enter Deep Sleep and at least another 10 milliseconds to exit Deep Sleep.
The document describes features specific to BlueCore chips; Bluetooth’s own standard power saving support (Hold, Sniff and Park modes) are mentioned only where they interact with the chip’s power saving modes.
In Deep Sleep, the processor, the fast (16MHz) clock and much of the digital and analogue hardware are shut down. This has a major effect on power consumption
When the device enters Deep Sleep, it sets an alarm clock (a timed event from a counter that is clocked by the slow clock). The timed event normally wakes the chip, but it can be woken prematurely by activity on the UART or USB.
在deep sleep模式下，芯片每1ms被唤醒一次，也可以被UART或USB激活。
Deep Sleep cannot be used when the chip has a USB host connection and the connection is in its USB “active” state.
这就是Demo板的UART通信不会发生异常的原因。
Once the system is in Deep Sleep, only a limited set of stimuli can rouse it:
Expiry of a timer (clocked from the chip’s slow clock)
When configured to provide a UART, any activity on the data-receive pin. (Including asserting a break condition, e.g., to force a reboot.)
When configured to provide a UART, activity on the CTS line (This is configured with the PS Key PSKEY_DEEP_SLEEP_WAKE_CTS.)
BlueCore2-External can be configured to wake on PIO activity
When configured to provide a USB host connection, any activity on the data lines
Any activity on the chip’s SPI port (pstool.exe relies on this to read and write PS Keys if the chip is in Deep Sleep.)
The PS Key PSKEY_DEEP_SLEEP_WAKE_CTS (0x23c) can be set to allow a transition on the UART CTS line to wake the host from Deep Sleep; this can provide an alternative to sending a short “wake up” packet.
###3.2.2. 用PIO唤醒
The PIO port continues to drive output signals when the chip drops into Deep Sleep.
for a button on a headset, a common technique is to route the button’s signal to an input PIO pin and also to the UART CTS line. Activity on the CTS line can then wake the chip.
###3.2.3. 用唤醒包唤醒
The chip is eligible to enter Deep Sleep if there has been no UART traffic from the host for at least one second and if there is no data waiting to be passed to the host.
The “one second” is actually the value of the PS Key PSKEY_UART_SLEEP_TIMEOUT (0x0222).
