nRF54L15 GPIO 特性

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nRF54L15 的GPIO口分配

​ APB总线用于低速且低功耗的外围设备，nRF54L15根据APB总线的标号，对外设进行命名且对GPIO口进行端口分配。AMBIX为AMBA总线互联通道。

AMBIX0/APB00:

GPIO_P22.00~P2.10

APB/AHB外设如：CCM00，UARTE00，SPIM00，SPIS00...

AMBIX1/APB10:

GPIO：None

外设如：RADIO，TIMER10，PPIB10...

AMBIX2/APB20:

GPIO_P1: P1.00~P1.14(包括P1.00/P1.01 XL1 XL2)

外设如：GPIOTE20,UARTE20～22，TWIM20～22，GRTC，SAADC，PWM20～22...

在nRF54L15DK原理图上 : UART1 即APB20上的 UART20

AMBIX3/APB30:

GPIO_P0: P0.00~P0.04

外设如：GPIOTE30,UARTE30，RESET，WDT30～31...

有些外设对GPIO的引脚选择有要求，如：

[td]

Peripheral	Description
UARTE20/21	Can use any pin on P1. Can connect across power domains to dedicated pins on P2.
SPIMOO	Has dedicated pins on P2. For 32 MHz operation, the pins must be configured usingextra high drive EO/E1 configuration in the DRIVE0/1 fields of the PIN_CNF GPIOregister.
SPIM20/21	Can use any pins on P1; see notes on clock pins. Can be connect across powerdomains to dedicated pins on P2.
SPIS20/21	Can use any pins on P1; see notes on clock pins. Can connect across power domainsto dedicated pins on P2.
TRACE	Has dedicated pins that must be configured using extra high drive EO/E1configuration in the DRIVE0/1 fields of the PIN_CNF GPIO register.
GRTC	Has dedicated pins for clock and PWM output.
TAMPC	Has dedicated pins for active shield input and output.
FLPR	Uses dedicated pins on P2 for emulated peripherals such as QSPI.
RADIO	Uses dedicated pins on P1 for antenna switch control (DFEGPIO for directionfinding).
NFC	Uses dedicated pins as listed in the pin assignments table for the selected device.These pins are configured as NFC antenna pins from reset. To use the pins forDigital 1/0, NFC function must be disabled in the NFCT - Near field communicationtag on page 348 peripheral.

外设管脚的默认配置: ncs/zephyr/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi

用户可以通过在app工程中添加XXX.overlay文件对外设管脚进行重新分配。比如：

编译完成后可以通过查看生成的zephyr.dts确认.overlay的文件是否生效，并检查GPIO的管脚配置是否正确。比如button工程编译后最终zephyr.dts所在目录：ncs/zephyr/samples/basic/button/build/button/zephyr/zephyr.dts