ADK2.5.1 I2S输出时钟问题

ydlshhong2001

ADK2.5.1  csr_i2s_audio_plugin.c 中：
Sink CsrI2SAudioOutputConnect(uint32 rate, bool stereo, Source left_port, Source right_port)
{
    /* obtain sink to I2S interface */
    Sink lSink_A = StreamAudioSink(AUDIO_HARDWARE_I2S, AUDIO_INSTANCE_0, AUDIO_CHANNEL_SLOT_1 );
    /* configure the I2S interface operating mode, run in master mode */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_MASTER_MODE, TRUE));
   
    /* set the sample rate of the dsp audio data */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_MASTER_CLOCK_RATE, (rate * MCLK_SCALING_FACTOR)));   //rate :48k, CLK_SCALING_FACTOR    默认256
    /* set the sample rate of the dsp audio data */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_SYNC_RATE, rate));  
              
    /* left justified i2s data */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_JSTFY_FORMAT, 0));
     
    /* MSB of data occurs on the second SCLK */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_LFT_JSTFY_DLY, 1));
    /* data is LEFT channel when word clock is high */   
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_CHNL_PLRTY, 0));
     
    /* number of data bits per sample, 16 */
    PanicFalse(SinkConfigure(lSink_A, STREAM_I2S_BITS_PER_SAMPLE, 16));
      
    /* if STEREO mode configured then connect the output channel B */
    if(stereo)
    {
        /* obtain sink for channel B I2S interface */
        Sink lSink_B = StreamAudioSink(AUDIO_HARDWARE_I2S, AUDIO_INSTANCE_0, AUDIO_CHANNEL_SLOT_0 );  
   
        /* configure the I2S interface operating mode, run in master mode */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_MASTER_MODE, TRUE));
        /* set the master clock rate of the dsp audio data, this is  */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_MASTER_CLOCK_RATE, (rate * MCLK_SCALING_FACTOR)));
        /* set the sample rate of the dsp audio data */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_SYNC_RATE, rate));   
        /* left justified i2s data */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_JSTFY_FORMAT, 0));  
        /* MSB of data occurs on the second SCLK */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_LFT_JSTFY_DLY, 1));
        /* data is LEFT channel when word clock is high */   
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_CHNL_PLRTY, 0));   
        /* number of data bits per sample, 16 */
        PanicFalse(SinkConfigure(lSink_B, STREAM_I2S_BITS_PER_SAMPLE, 16));
        
        /* synchronise both sinks for channels A & B */
        PanicFalse(SinkSynchronise(lSink_A, lSink_B));
        /* connect dsp ports to i2s interface */
        PanicFalse(StreamConnect(left_port, lSink_A));
        PanicFalse(StreamConnect(right_port, lSink_B));
    }
    /* mono operation, only connect left port */

修改目标：采样率-48k，双通道、16位， 位时钟：48k * 32

MCLK_SCALING_FACTOR 修改为256、128、64时，I2S还有数据输出，而设为32时，没有数据输出。有人知道什么问题吗？

LXQ

hazmo

sorry, missed up

wth424057

通常MCLK=128*LRCK以上，最常见的是256倍，但绝不能等于位时钟。其实MCLK并非I2S必须，而是有的DAC需要用其进入睡眠或静音模式

xxxylgy

顶顶更健康，呵呵，小弟纯属灌水赚金币。